Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension
نویسندگان
چکیده
منابع مشابه
A Novel Fast FIR Algorithm for Area-Efficient Parallel FIR Digital Filter Structures Utilizes Symmetric Convolutions
Based on fast finite-impulse response (FIR) algorithms (FFAs), this paper proposes new parallel FIR filter structures, which are beneficial to symmetric coefficients in terms of the hardware cost, under the condition that the number of taps is a multiple of 2 or 3. The proposed parallel FIR structures exploit the inherent nature of symmetric coefficients reducing half the number of multipliers ...
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This paper describes efficient architectures for FIR filters. By exploiting the reduced complexity made possible by the use of two powers-of-two coefficients, these architectures allow the implementation of high sampling rate filters of significant length on a single field-programmable gate array (FPGA). The author can be contacted via e-mail at [email protected]. Portions of this work will ...
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In this paper an area efficient method is presented to design and implement FIR filter. The proposed FIR filter has been implemented equiripple window using Transposed & Symmetric structure. The performance of two designs has been compared in terms of hardware requirements. The performance of both the designs is almost same but Symmetric structure has shown reduced hardware requirement as compa...
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The Finite Impulse Response (FIR) filters are widely used in many Digital Signal Processing (DSP) applications. For these applications, the low power, less area, high speed and low complexity FIR filter architectures are required. The researchers have proposed many FIR filters to meet the above design specifications. This paper is focused on the some efficient reconfigurable FIR filter architec...
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ژورنال
عنوان ژورنال: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
سال: 2009
ISSN: 1063-8210,1557-9999
DOI: 10.1109/tvlsi.2009.2016715